Detector for x-ray imaging

ABSTRACT

Disclosed is an edge-on photon counting detector and a method for manufacturing a charge collecting side of such detector. The edge-on photon counting detector comprises a semi-conducting substrate. The semi-conducting substrate comprises, a first end adapted to face an x-ray source and a second end opposite the first end in the direction of incoming x-rays, and at least one strip having N depth segments, N≥2, each of the depth segments comprising a charge collecting metal electrode and a charge collecting side comprising doped regions and insulating regions, wherein each of the charge collecting metal electrodes is arranged over a corresponding doped region and is connected to a respective routing trace arranged on the insulating regions, the respective routing trace being adapted to conduct signals from the charge collecting metal electrode to a read-out pad E, connectable to front-end electronics, arranged at the second end.

TECHNICAL FIELD

The present invention relates generally to detectors for x-ray imagingand more particularly to semi-conducting strip detectors forphoton-counting x-ray imaging as well as methods for manufacturing thedetectors.

BACKGROUND

Semi-conducting detectors, such as silicon detectors, are widely used inx-ray imaging to detect x-ray photons and convert them into digitalsignals or digital images by collecting charge carriers released by eachinteracting photon. For low-energy x-rays, semi-conducting detectors arecommonly made to be pixelated, by orienting detector surface towardsx-rays and dividing the detector plane into a number of pixels. Eachpixel collects charges generated by x-ray interactions within the pixelthrough an applied electric field and feed the charges to correspondingfront-end electronics. However, due to low atomic number and lowdensity, for imaging with high-energy x-rays, such as x-ray computedtomography, the pixelated configuration of e.g. a silicon detector isnot capable of capturing all high-energy x-rays with a substratethickness less than half millimeter, resulting in low detectionefficiency. The low atomic number of silicon also means that thefraction of Compton scattered x-ray photons in the detector dominatesover the photo absorbed photons which creates problem because thescattered photons may induce signals in other pixels in the detectorwhich will be equivalent to noise in those pixels.

One way to overcome the problem of low absorption efficiency for siliconis to employ edge-on configuration of the detector by orienting the edgeof a silicon detector towards incident x-rays so that the depth ofsilicon can be significantly increased. The first mentioning ofcrystalline silicon strip detectors in edge-on geometry as an x-raydetector is R. Nowotny: “Application of Si-microstrip-detectors inmedicine and structural analysis” Nuclear Instruments and Methods inPhysics Research 226 (1984) 34-39. It concludes that silicon will workat low energies such as for breast imaging but not for higher energiessuch as computed tomography mainly because of the higher fraction ofCompton scattering and problems related to this.

The edge-on geometry for semiconductor detectors is also suggested inU.S. Pat. No. 4,937,453 Robert Nelson “X-ray detector for radiographicimaging”, U.S. Pat. No. 5,434,417 David Nygren “High resolutionenergy-sensitive digital X-ray” and U.S. Pat. No. 7,291,841 B2 RobertNelson et al. “Device and system for enhanced SPECT, PET, and Comptonscatter imaging in nuclear medicine”. In U.S. Pat. No. 5,434,417, theconcept of a segmented silicon strip detector is described, but how thecharge collecting electrodes are connected to the front-end electronicsand the arrangement of routing traces are not presented. In U.S. Pat.No. 7,291,841 B2 edge-on detectors are used for so called Comptonimaging which does not relate to the present invention. In a paper byShoichi Yoshida, Takashi Ohsugi “Application of silicon strip detectorsto X-ray computed tomography” Nuclear Instruments and Methods in PhysicsResearch A 541 (2005) 412-420 an implementation of the edge-on conceptis outlined. In this implementation thin tungsten plates placed betweenedge-on silicon strip detector reduces the background of scatteredX-rays and improve the image contrast with low dose.

The implementation of edge-on silicon strip detectors is furtherdescribed in U.S. Pat. No. 8,183,535 B2 Mats Danielsson et al. “Silicondetector assembly for x-ray imaging”, Cheng Xu et al.: “Energyresolution of a segmented silicon strip detector for photon-countingspectral CT” Nuclear Instruments and Methods in Physics Research715(2013)11-17 and Xuejin Liu et al.: “Spectral response model for amultibin photon-counting spectral computed tomography detector and itsapplications” Journal of Medical Imaging 2(3) (2015) 033502. And asdescribed each strip is further divided into depth segments to mitigatethe load of front-end electronics under high flux applications of x-rayimaging, such as x-ray computed tomography. The photon-converted signalsdetected in each depth segment are conducted to an individual processingchannel of the front-end electronics via a routing trace which connectsthe corresponding charge collecting electrode of the depth segment andthe input of a channel in front-end electronics. Described by Cheng Xuet al.: “Energy resolution of a segmented silicon strip detector forphoton-counting spectral CT” Nuclear Instruments and Methods in PhysicsResearch 715(2013)11-17, two different metal layers are implemented onthe charge collecting side of silicon substrate with one metal layer forcharge collecting electrodes and the other layer for routing traces. InSwedish Patent Application No. 9801677-7, Mats Danielsson, a silicondetector with routing traces running in between charge collectingelectrodes for monitoring of radiation therapy is described. E. BELAU etal. “Charge collection in silicon strip detectors” Nuclear instrumentsand methods in physics research 214(2-3) (1983) 253-260 described atelescope detector used for particle physics with routing traces on thesame layer as the charge collecting electrodes. Thin and heavy metalsheets are suggested in U.S. Pat. No. 8,183,535 B2 Mats Danielsson etal. “Silicon detector assembly for x-ray imaging” to be attached to thesubsets of silicon detectors to partly stop the scattered photons as aresult of Compton scattering from reaching other silicon detectors.

Capacitance is one of the most critical parameters for a detector, whichis directly related to the level of electronic noise of front-endelectronics. The noise level needs to be as low as possible for anyimaging detectors to acquire images with satisfactory quality. Forenergy-integrating detectors, in which the detected photons areintegrated over a certain time interval, the electronic noise isintegrated in the readout signal, resulting in deteriorated imagequality. For photon-counting detectors, the lowest energy thresholdshould be set higher than the level of noise floor to reject fake countsinduced by noise. Therefore, lowering the input capacitance to thefront-end electronics is an important task when designing a newdetector.

For semi-conducting detectors such as silicon detectors, taking thesingle-sided silicon strip detector as a particular example, thefollowing two contributions are the main capacitance sources, thebackside capacitance which is the capacitance between a chargecollecting electrode and the backside of the silicon substrate, and theinter-strip capacitance which is the capacitance between neighboringcharge collecting electrodes. For detectors with routing tracesconnecting the charge collecting electrodes and the input of front-endelectronics, the trace capacitance also plays a significant role,including the capacitance between neighboring routing traces, thecapacitance between a routing trace and a charge collecting electrode.Out of the range of the x-ray sensitive area, the silicon substratemight be covered by a large area of implantation layer which would alsocontribute to capacitance if there are routing traces running on top ofthat.

There has been a considerable interest in edge-on silicon detectors formedical imaging in particular for imaging with high-energy x-rays.However, when the number of depth segments is larger than one, a problemarises in conjunction with routing to the front-end electronics. Adesign with two metal layers is described by Cheng Xu et al.: “Energyresolution of a segmented silicon strip detector for photon-countingspectral CT” Nuclear Instruments and Methods in Physics Research715(2013)11-17, where the routing traces run on a different metal layerthan that of charge collecting metal electrodes, exhibiting highercapacitance and complexity in implementation. And more dead space isadded by the insulator material between two metal layers, which resultsin a loss in geometrical efficiency. It is also suggested in U.S. Pat.No. 8,183,535 B2 Mats Danielsson et al. “Silicon detector assembly forx-ray imaging” to spread out the front-end electrodes over the area ofthe sensor or on top of the sensor, with which the front-end electronicswould be exposed to radiation and also the front-end electronics wouldtake space and make impossible a very dense packing. Therefore, it isdesirable to provide a way to conduct routing traces to the front-endelectronics with reduced implementation complexity and optimalcapacitance to the front-end electronics.

SUMMARY

The proposed technology aims to provide an edge-on semi-conductingdetector that at least mitigates some of the capacitance relatedproblems associated with detectors having routing traces connecting thecharge collecting electrodes with the input of front-end electronics.

A specific object of the proposed technology is to provide a photoncounting edge-on semi-conducting detector having improved capacitancecharacteristics. In particular to provide a photon counting edge-onsemiconducting detector with reduced capacitance.

Another object is to provide a method for manufacturing a photoncounting edge-on semi-conducting detector having improved capacitancecharacteristics, in particular reduced capacitance.

According to a first aspect of the proposed technology there is providedan edge-on photon counting detector. The detector comprises asemi-conducting substrate that comprises a first end adapted to face anx-ray source and a second end opposite the first end in the direction ofincoming x-rays. The semi-conducting substrate comprises at least onestrip having N depth segments, N≥2. Each of the depth segments comprisesa charge collecting metal electrode. The semi-conducting substrate alsocomprises a charge collecting side comprising doped regions andinsulating regions. Each of the charge collecting metal electrodes isarranged over a corresponding doped region and is connected to arespective routing trace arranged on the insulating regions. Therespective routing trace being adapted to conduct signals from thecharge collecting metal electrode to a read-out pad, that is connectableto front-end electronics, arranged at the second end.

According to a second aspect of the proposed technology there isprovided a method for manufacturing a charge collecting surface for anedge-on detector. The method comprises providing a semi-conductingsubstrate, the semi-conducting substrate having a first end adapted toface an x-ray source and a second end opposite the first end. The methodalso comprises providing a surface of the semi-conducting substrate,referred to as the charge collecting surface, with doped regions, thedoped regions having a first type of doping. The method also comprisesproviding an insulating layer on the regions of the second surface thatare not provided with doped regions. The method also comprises arranginga read-out pad at the second end of the semi-conducting substrate. Themethod further comprises depositing a single metal layer on top of thecharge collecting surface comprising the doped regions and theinsulating layer. The method further comprises patterning the singlemetal layer in order to i) form charge collecting metal electrodes ontop of the doped regions , and ii) form routing traces on top of theinsulating layer that connects the charge collecting metal electrodewith the read-out pad.

Embodiments of the proposed technology provides an edge-on detectorhaving excellent capacitance characteristics. Such a detector will inturn ensure that the noise levels at the front-end electronics arereduced which will increase the quality of the acquired images. Furtheradvantages will become clear upon reading later sections.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic diagram of part of a sensor.

FIG. 2 is a schematic diagram of the cross section of a sensor.

FIG. 3 is a schematic diagram illustrating the widths of chargecollecting electrodes and routing traces.

FIG. 4 depicts capacitance as a function of ratio of electrode width tostrip pitch.

FIG. 5 depicts noise level as a function of capacitance.

FIG. 6 is a schematic diagram illustrating a sensor with 2 depthsegments and how routing traces are connected to readout pads.

FIG. 7 is a schematic diagram illustrating the cross section of thebottom area of Silicon substrate.

FIG. 8a is a schematic diagram illustrating the routing area at sensorbottom with a full P-plus implantation.

FIG. 8b is a schematic diagram illustrating the routing area at sensorbottom without P-plus implantation underneath routing traces.

FIG. 8c is a schematic diagram illustrating the routing area at sensorbottom being P-plus implanted in strips.

FIG. 9 is a schematic diagram of a trapezoid-shaped sensor.

FIG. 10 is a schematic diagram of a sensor with chamfered corners.

FIG. 11 illustrates an x-ray imaging system where an edge-on detectoraccording to the proposed technology may be used.

FIG. 12 provides another illustration of an x-ray imaging system wherean edge-on detector according to the proposed technology may be used.

FIG. 13 is a schematic diagram illustrating an edge-on detector having anumber of strips.

FIG. 14 is a schematic diagram illustrating an edge-on detector having anumber of strips and a number of depth-segments.

FIG. 15 is a schematic diagram illustrating how routing traces areconnected to the front-end electronics on an edge-on detector.

FIG. 16 is a flow diagram illustrating a method for manufacturing acharge collecting side of an edge-on detector.

DETAILED DESCRIPTION

The present invention aims to provide an edge-on semi-conducting stripdetector having improved capacitance characteristics. The provided stripdetector is suitable to use in x-ray imaging in an energy range from 40keV to 250 keV. In order to achieve the goal, a metal layer may beimplemented on the charge collecting side of the detector in order toobtain conducting routing traces that runs in the same metal layer ascharge collecting electrodes. In addition, methods and strategies areprovided to reduce the capacitance associated the strip detector.

Before describing various embodiments of the proposed technology, it maybe useful to begin with an overview of the technology where an edge-onsemi-conducting strip detector can be used. To this end reference ismade to FIG. 11. In this non-limiting example, an x-ray imaging system100 basically comprises an x-ray source 10, an x-ray detector system 20and an associated image processing device 30. In general, the x-raydetector system 20 is configured for registering radiation from thex-ray source 10 that may have been focused by optional x-ray optics andpassed an object or subject or part thereof. The x-ray detector system20 is connectable to the image processing device 30 via suitable analogprocessing and read-out electronics (which may be integrated in thex-ray detector system 20) to enable image processing and/or imagereconstruction by the image processing device 30.

As illustrated in FIG. 12, another example of an x-ray imaging system100 comprises an x-ray source 10, which emits x-rays; an x-ray detectorsystem 20, which detects the x-rays after they have passed through theobject; analog processing circuitry 25, which processes the rawelectrical signal from the detector and digitizes it; digital processingcircuitry 40 which may carry out further processing operations on themeasured data such as applying corrections, storing it temporarily, orfiltering; and a computer 50 which stores the processed data and mayperform further post-processing and/or image reconstruction.

The overall detector may be regarded as the x-ray detector system 20, orthe x-ray detector system 20 combined with the associated analogprocessing circuitry 25.

The digital part including the digital processing circuitry 40 and/orthe computer 50 may be regarded as a digital image processing system 30,which performs image reconstruction based on the image data from thex-ray detector. The image processing system 30 may thus be seen as thecomputer 50, or alternatively the combined system of the digitalprocessing circuitry 40 and the computer 50, or possibly the digitalprocessing circuitry 40 by itself if the digital processing circuitry isfurther specialized also for image processing and/or reconstruction.

An example of a commonly used x-ray imaging system is a ComputedTomography (CT) system, which may include an x-ray source that producesa fan or cone beam of x-rays and an opposing x-ray detector system forregistering the fraction of x-rays that are transmitted through apatient or object. The x-ray source and detector system are normallymounted in a gantry that rotates around the imaged object.

Accordingly, the x-ray source 10 and the x-ray detector system 20illustrated in FIG. 12 may thus be arranged as part of a CT system, e.g.mountable in a CT gantry.

A challenge for x-ray imaging detectors is to extract maximuminformation from the detected x-rays to provide input to an image of anobject or subject where the object or subject is depicted in terms ofdensity, composition and structure. It is still common to usefilm-screen as detector but most commonly the detectors today provide adigital image.

The proposed technology relates in part to the particular design of asemiconductor edge-on detector. The semiconducting edge-on detector maycomprises any suitable semi-conducting material. Certain embodiments ofthe proposed technology relates to a detector substrate of Silicon.Other materials are however possible. Promising materials forphoton-counting x-ray detectors are cadmium telluride (CdTe), cadmiumzinc telluride (CZT) and silicon (Si). CdTe and CZT are employed inseveral photon-counting spectral CT projects for the high absorptionefficiency of high-energy x-rays used in clinical CT. However, theseprojects are slowly progressing due to several drawbacks of CdTe/CZT.CdTe/CZT have low charge carrier mobility, which causes severe pulsepileup at flux rates ten times lower than those encountered in clinicalpractice. One way to alleviate this problem is to decrease the pixelsize, whereas it leads to increased spectrum distortion as a result ofcharge sharing and K-escape. Also, CdTe/CZT suffer from charge trapping,which would lead to polarization that causes a rapid drop of the outputcount rate when the photon flux reaches above a certain level.

In contrast, silicon has higher charge carrier mobility and is free fromthe problem of polarization. The mature manufacturing process andcomparably low cost are also its advantages. But silicon has limitationsthat CdTe/CZT does not have. Silicon sensors must accordingly be quitethick to compensate for its low stopping power. Typically, a siliconsensor needs a thickness of several centimeters to absorb most of theincident photons, whereas CdTe/CZT needs only several millimeters. Onthe other hand, the long attenuation path of silicon also makes itpossible to divide the detector into different depth segments, as willbe explained below. This in turn makes it possible for a silicon-basedphoton-counting detector to properly handle the high fluxes in CT.

FIG. 13 provides a schematic diagram that illustrates an example of asemi-conductor detector module. This is an example of a semiconductordetector module with the sensor part 21 split into detector elements orpixels 22, where each detector element (or pixel) is normally based on adiode having a charge collecting electrode as a key component. Thex-rays enter through the edge of the semiconductor detector. As can beseen in the FIG. 16, the detector elements may be arranged in individualstrips along the surface of the detector.

FIG. 14 is a schematic diagram illustrating an example of semiconductordetector module according to another exemplary embodiment. In thisexample, the semiconductor sensor part 21 is also split into so-calleddepth segments 22 in the depth direction, again assuming the x-raysenter through the edge. It should be noted that each of the detectorelements comprises a charge collecting electrode and correspondingrouting traces adapted to convey signals from the charge collectingelectrode to front-end electronics. Normally, such a detector element isan individual x-ray sensitive sub-element of the detector. In general,the photon interaction takes place in a detector element and the thusgenerated charge is collected by the corresponding electrode of thedetector element. Each detector element typically measures the incidentx-ray flux as a sequence of frames. A frame is the measured data duringa specified time interval, called frame time.

FIG. 15 is a schematic illustration of semiconductor detector moduleaccording to another exemplary embodiment. Routing traces C connects thecharge collecting electrodes of the detector with inputs of front-endelectronics V. The readout pads are not disclose in FIG. 15, instead itis shown how the routing traces connects to front-end electronics orcircuits attached to the detector. The readout pads are in this drawingarranged underneath the front-end electronics.

Depending on the detector topology, a detector element may correspond toa pixel, especially when the detector is a flat-panel detector. Adepth-segmented detector may be regarded as having a number of detectorstrips, each strip having a number of depth segments. For such adepth-segmented detector, each depth segment may be regarded as anindividual detector element, especially if each of the depth segments isassociated with its own individual charge collecting electrode.

The detector strips of a depth-segmented detector normally correspond tothe pixels of an ordinary flat-panel detector. However, it is alsopossible to regard a depth-segmented detector as a three-dimensionalpixel array, where each pixel (sometimes referred to as a voxel)corresponds to an individual depth segment/detector element.

Having described the overarching system where an edge-on detector may beused, in what follows we will describe a particular edge-on detectorthat provides improved capacitance characteristics.

The proposed technology provides an edge-on photon counting detectorcomprising a semi-conducting substrate 102 comprising:

-   -   a first end 11 adapted to face an x-ray source and a second end        12 opposite the first end 11 in the direction of incoming        x-rays,    -   at least one strip having N depth segments, N≥2, each of the        depth segments comprising a charge collecting metal electrode        104,    -   a charge collecting side comprising doped regions 107 and        insulating regions 106. Each of the charge collecting metal        electrodes 104 is arranged over a corresponding doped region 107        and is connected to a respective routing trace 103 arranged on        the insulating regions 106, the respective routing trace 103        being adapted to conduct signals from the charge collecting        metal electrode to a read-out pad 105, connectable to front-end        electronics, arranged at the second end.

FIG. 1 is a schematic diagram illustrating an example of part of such adetector. In this embodiment, the semi-conducting substrate may compriseN-type crystalline silicon, and the detector may be oriented edge-onwith regard to the incoming x-rays 101 that impinges from an edge of thedetector. The semi-conducting substrate 102 of the detector is splitinto strips and each strip is subsequently split into a number of depthsegments in the depth direction which is also the x-ray incidentdirection. Each depth segment may be formed by a back-biased diode whichshould be fully depleted so that the whole volume works as detector forx-rays. In the present embodiment, each depth segment within a strip hasan individual charge collecting electrode on the charge collecting sidewith metal contact deposited on top of a doped region 107, e.g., on topof a P-plus implantation, which is connected to the associated front-endelectronics via routing traces 103. The metal contact of the chargecollecting electrode is labeled as 104 in FIG. 1. Only the routingtraces for the left column of metal charge collecting electrodes areillustrated in FIG. 1. One example of front-end electronics is anApplication-specific-integrated circuit, ASIC. The ASIC contains anumber of signal processing channels each of which is connected to acorresponding charge collecting electrode. In the present embodiment,the routing traces 103 used to conduct signals from the chargecollecting electrodes to the front-end electronics are arranged so thatthey run in the area between charge collecting electrodes as illustratedin FIG. 1. The charge collecting side of the detector is in the presentembodiment therefore provided with a single metal layer. This particularfeature renders the use of an extra layer for routing traces obsolete.The benefits of the implementation with only a single metal layerinclude less capacitance, higher geometrical efficiency and also areduction in complexity of the implementation. It can also be seen inFIG. 1 that the inputs of front-end electronics are attached to thereadout pads 105 on the detector. This can be done by means of wirebonding, bump bonding, or any other multi-chip module technologies. In apreferred embodiment, the front-end electronics may be attached to thebottom edge 12 of the detector where the routing traces are converging.

According to a particular embodiment of the proposed technology there isprovided an edge-on detector wherein the semi-conducting substratecomprises silicon.

According to another embodiment of the proposed technology there isprovided an edge-on detector wherein the charge collecting metalelectrodes 104 and the routing traces 103 are manufactured from the samemetal. That is, the charge collecting metal electrodes 104 and therouting traces 103, are provided in a single metal layer on the chargecollecting side of the substrate 102. The metal used for the chargecollecting electrode and the routing traces may in a particularembodiment be aluminum.

By way of example, the edge-on detector according to the proposedtechnology may comprise insulating regions 106 of silicon dioxide.

FIG. 2 is a schematic diagram illustrating a cross section of asemi-conducting substrate, e.g. a silicon substrate, 102 according to anexemplary embodiment of the proposed technology. The cross sectionillustrates an edge-on detector having two strips, each strip having twocharge collecting electrodes and two routing traces 103 in between. Themetal contacts 104 of the charge collecting electrodes may for examplebe deposited on top of P-plus implantation so that they run on the samemetal layer as the routing traces. A thin insulating layer, e.g. asilicon dioxide layer, 106 is used as passivation on the front side ofthe silicon substrate. In the present embodiment, a bias is fed from thebackside contact 108 through N-plus implantation to fully deplete thedetector. It should be recognized that FIG. 2 is only an illustrativeexample, the detector may contain more details, it may for example,contain more passivation layers on the charge collecting side.

Narrow charge collecting electrodes are preferred from a capacitanceperspective. Another benefit obtained with narrow charge collectingelectrodes is that the fitting of routing traces in between chargecollecting electrodes are facilitated.

FIG. 3 is a schematic diagram of part of a semi-conducting substrate,e.g. a silicon substrate, 102. Illustrated in FIG. 3 is a magnified viewof the third depth segment in FIG. 1, with metal contacts 104 of chargecollecting electrodes and routing traces 103 running on the same metallayer. Letting P represent the pitch of the strips, W_(E) represent thewidth of charge collecting electrodes and W_(T) represent the width ofrouting traces, the ratio of electrode width to strip pitch is given by:

R _(E) =W _(E) /P

And the ratio of routing trace width to strip pitch is given by:

R _(T) =W _(T) /P.

According to a particular embodiment of the proposed technology there isprovided an edge-on detector wherein the number of strips is at leasttwo and wherein the width dimensions of the charge conducting metalelectrodes are such that the ratio of the charge collecting metalelectrode width to strip pitch is less than 0.8 in order to reducecapacitance.

FIG. 4 illustrates the simulated capacitance as a function of the ratioof electrode width to strip pitch for a detector having 0.6 mm thicksilicon substrate, 0.37 mm strip pitch and 5 μm wide routing traces.Three depth segments are simulated with the lengths of depth segments of10 mm, 15 mm and 20 mm, respectively. There is another metal surface asanti-scatter sheet or the surface of another detector which is 20 μmdistant to the charge collecting side of the simulated detector with 30%glue and 70% air in between. When the ratio is below 0.8, thecapacitance is nearly linearly proportional to the ratio, but when theratio is larger than 0.8, there is a dramatically increase of thecapacitance. This result has been validated for other strip pitches.

According to yet another embodiment of the proposed technology there isprovided an edge-on detector wherein the number of strips is at leasttwo and wherein the width dimension of the routing traces are such thatthe ratio of the routing trace width to strip pitch is less than 0.05.This embodiment provides an edge-on detector having improved capacitancecharacteristics, i.e. displaying reduced capacitance.

FIG. 5 shows a nearly linear relationship between noise level of thedetector and the detector capacitance. Therefore, it is concluded thatthe ratio R_(E) is preferably to be less than 0.8 for the width ofcharge collecting electrodes from capacitance and signal to noise ratioperspective. It can further be concluded that the ratio R_(T) ispreferable to be less than 0.05 for the width of routing traces in thepresent embodiment.

For the bottom depth segments with more routing traces running inbetween, more space is required for routing traces to be fit in betweenneighboring charge collecting electrodes. A ratio of the gap betweenneighboring charge collecting electrodes to strip pitch is defined as:

R _(G) =W _(G) /P,

which preferably should be larger than 0.05×(N+1) with N≥2 being thenumber of depth segments.

It should be recognized that the charge collecting electrodes cannot bemade extremely narrow since the bare area of the interface betweensilicon and silicon dioxide is sensitive to radiation without animplantation cover. There is therefore a tradeoff between capacitanceand radiation hardness of the detector.

According to another embodiment of the disclosed edge-on detector, thesemi-conducting substrate 102 is provided with doped regions in the areaadjacent to the read-out pad arranged at the second end. FIG. 8aprovides a schematic illustration of this embodiment. The doped regionadjacent to the read-out pad is denoted 202 while the area with dopedregions on which charge collecting electrodes are provided are denoted201. The doped regions are in this particular illustration P-plus dopedregions. This is however merely an example, other types of doping may beused.

As indicated in FIG. 1, at the second end of the detector, the routingtraces are connected to the readout pads which are subsequentlyconnected to the front-end electronics. There is a requirement todecrease the length of routing traces and distribute the routing tracessparsely to minimize capacitance to the input of front-end electronics.It is conceivable to have front-end electronics covering a large part ofthe detector or the whole detector at the end of the last chargecollecting electrodes. However, the integrated circuits of front-endelectronics are tend to be small today for high speed, low power andreduced manufacturing cost, which means that in most cases, thefront-end electronics can only cover a small part of the detector. Thereare detectors with small pixel pitches, which are comparable to theinput pitch of front-end electronics, for example, mammography withpixel pitch of a few tens of micrometers. For such detectors, thefront-end electronics can be bonded very close to the charge collectingelectrodes with minimum length of routing traces and thus minimumcapacitance. However, there are also some x-ray imaging detectors withlarge pixel pitches, for example, x-ray computed tomography, where thepixel pitch is much larger than the input pitch of front-endelectronics. Such cases are illustrated in FIG. 6, the routing traceswill most likely occupy an area out of the x-ray sensitive part 201 ofthe detector and converge to the readout pads in the area 202 of thedetector, forming a fan shape. A guard ring structure is a feature onthe charge collecting side that is specially provided to minimize edgeeffects and to provide guarantees of a defined homogeneous potential forall strips and all depth segments. A guard ring structure is illustratedin FIG. 6. Usually, but not always, one or several guard rings areplaced between the active part of a detector and the detector edge. Thefirst ring is directly connected to a certain potential, usually ground,to provide a drain for the leakage current generated at the edge of thedetector. There might be one or more floating rings to discretely adaptthe potential in order to make the voltage drops from outside insmoothly. The rings normally have the same structure as strips and depthsegments, with same type of metal and doping. Only the metal part of onering is illustrated in FIG. 6.

FIG. 7 is a schematic diagram illustrating an example cross section ofthe area adjacent to the read-out pad of silicon substrate according toan exemplary embodiment. The routing traces C are running on top of aninsulating layer 106 comprising silicon dioxide. Usually, but notalways, the insulating layer 106 covers the whole area adjacent to theread-out pad. Underneath the silicon dioxide, in one embodiment of thepresent claimed invention, with N-type crystalline silicon, a P-plusimplantation 203 that extends from guard ring of the detector usuallycovers the whole bottom area which would however yield high capacitancebetween routing traces and the layer of P-plus implantation giventypical thickness of silicon dioxide.

According to another embodiment of the disclosed edge-on detector, thesemi-conducting substrate B is provided with doped regions in an areaadjacent to the read-out pads arranged at the second end. FIG. 8aprovides a schematic illustration of this embodiment. In thisembodiment, the doped region covers the whole area adjacent to theread-out pads. The doped regions are in this particular illustrationP-plus doped regions. This is however merely an example, other types ofdoping may be used.

Another embodiment provides an edge-on detector wherein the areaadjacent to the read-out pad are further provided with insulatingregions, whereby the doped regions and the insulating regions arearranged to form a pattern so that the routing traces run on theinsulating regions to the read-out pad. Particular examples of suchpatterns are given in FIGS. 8b and 8c . In FIG. 8b it is illustrated howan area of an insulating region 203 is surrounded by a doped region 204.The routing traces 103, not shown in the drawing, are intended to bearranged on top of the insulating region. In FIG. 8c it is illustratedhow insulating regions may be arranged in the area adjacent to theread-out pads to allow for the routing traces to connect to the read-outpads in a fan-shaped manner.

FIGS. 8a-c are schematic diagrams corresponding to differentimplementations of the implantation layer for the sensor shown in FIG.6, illustrating different strategies to cope with capacitance fromrouting traces running in the area adjacent to the read-out pad of thedetector. The x-ray sensitive part 201 contains the P-plus implantationof charge collecting electrodes, P-plus in FIG. 2, and the area 202 nearthe second end of the detector also contains a P-plus implanted area,P-plus in FIG. 7.

In one embodiment of the present claimed invention, as illustrated inFIG. 8a , there is implantation of the charge collecting electrodes onthe implantation layer, surrounded by a non-implanted area. An implantedarea extended from the implantation of guard ring covers the whole areaadjacent to the read-out pad at the second end of the sensor, whichresults in a relatively high capacitance in the present embodiment. Onlyone ring of the guard ring structure is shown as an illustration.

In another embodiment of the present claimed invention, as illustratedin FIG. 8b , at the bottom area of the sensor, an implanted area isstill extended from the guard ring but only in close proximity to theoutmost traces, so that for the area under traces, indicated by 203,there is no implantation. There is a long strip implanted area 204 nearcharge collecting electrodes, connected to the guard ring of the sensorto guide leakage current generated in the area at the second end of thesensor to the guard ring of the sensor and prevent disturbance producedin the area at the second end of the sensor from reaching the x-raysensitive part. The present embodiment is supposed to have leastcapacitance induced by routing traces running in the area at the secondend of a sensor.

In order to reduce the capacitance induced between routing traces andP-plus implantation in the area at the second end of a sensor, but alsokeep other aspects of the sensor reliable and under control incomparison with the previous embodiment, such as leakage current, breakdown voltage, another embodiment is provided. FIG. 8c is a schematicdiagram illustrating strip pattern of P-plus implantation 205 separatedby non-implanted regions 206 in the area adjacent to the read-out pad.The P-plus implant strips are connected to the guard ring of the sensor.Although in this example implant strips are parallel to chargecollecting electrodes along the sensor depth direction, the implantstrips can also be along other directions, for example, perpendicular tothe charge collecting electrodes, or in both directions to form a gridpattern, or any other patterns. The capacitance induced by routingtraces in the area adjacent to the read-out pad at the second end of asensor is reduced correspondingly by decreasing the area of P-plusimplantation. Letting a represent the width of implant strips, brepresent the width of non-implanted gaps, the capacitance can thus bereduced by approximately a factor of b/(a+b). In order to further reducethe capacitance, in a particular embodiment of the present invention,the non-implanted regions between implant strips can be arranged tofollow the path of routing traces which gives even less overlap betweenrouting traces and P-plus implantation and thus less capacitance.

Only one row of readout pads are depicted in the description of theabove embodiments for illustrative purpose, but more than one row ofreadout pads are apparent for those skilled in the art.

The proposed technology also provides an edge-on detector wherein thesemi-conducting substrate have a tapered shape, whereby the first end 11of the semi-conducting substrate have a first width and the second end12 of the semi-conducting substrate have a second width, larger than thefirst width. Such an edge-on detector may also contain a semi-conductingsubstrate that comprises at least two strips of charge collecting metalelectrodes, where the strips are angled relative each other so that thecharge collecting electrodes are provided on the charge collecting sidein a tapered pattern that is adapted to the tapered shape of thesubstrate.

Designs like these may be particularly useful when large-sized sensorsare utilized. An illustration of the design is provided by as the onesillustrated in FIG. 9. It can be seen in FIG. 9 that each individualdepth segment is tilted and arranged for pointing back to the x-raysource along the incoming direction of x-rays 101. A trapezoid shape ofa sensor forms an exemplary embodiment. Such a trapezoid shape ofsensors facilitates the extension of detector width by mounting sensorsside by side with minimum dead space in comparison with the squaredshape of the sensors, because each sensor should also be arranged forpointing back to the x-ray source. However, it should be recognized thata squared shape of large-sized sensors is also covered by the presentclaimed invention.

The proposed technology also provides an edge-on detector wherein thesecond end of the substrate comprises at least one chamfered corner.FIG. 10 is a schematic diagram illustrating another example of a sensorwith one corner being removed creating a chamfered shape of the sensor,which reduces capacitance induced from the nearest sensor and alsofacilitates the mounting of front-end electronics, by allocating morespace for the bonding connection of circuitry. The front-end electronicscan be connected to the sensor by wire bonding, bump bonding usingflip-chip technology, or any other bonding technology to form amulti-chip module.

As has been described above, the proposed technology provides an edge-onsemi-conducting strip detector that have improved capacitancecharacteristics. The strip detector is suitable to use in x-ray imagingin an energy range from 40 keV to 250 keV. A particular feature of sucha detector is that a single metal layer may be implemented on the chargecollecting side of the detector. This single layer comprises theconducting routing traces as well as the charge collecting electrodes.This particular feature provides for a detector having improvedcapacitance characteristics. The proposed technology therefore providesa method for manufacturing a charge collecting side of such an edge-ondetector.

To this end there is provided a method for manufacturing a chargecollecting surface for an edge-on detector, wherein the methodcomprises:

-   -   providing S1 a semi-conducting substrate 102, the        semi-conducting substrate having a first end adapted to face an        x-ray source and a second end opposite the first end;    -   providing S2 a surface of the semi-conducting substrate 102,        referred to as the charge collecting surface, with doped regions        107;    -   providing S3 an insulating layer 106 on the regions of the        second surface that are not provided with doped regions 107;    -   arranging S4 a read-out pad 105 at the second end of the        semi-conducting substrate;    -   depositing S5 a single metal layer on top of the charge        collecting surface comprising the doped regions 107 and the        insulating layer; and    -   patterning S6 the single metal layer in order to:        -   i) form charge collecting metal electrodes on top of the            doped regions 107, and;        -   ii) form routing traces 103 on top of the insulating layer            106 that connects the charge collecting metal electrode with            the read-out pad 105.

The proposed method is illustrated schematically in the flow diagram inFIG. 16.

According to a particular embodiment of the proposed method, the step S5of depositing a single metal layer comprises using Physical VaporDeposition (PVD), plating and/or Chemical Vapor Deposition (CVD).

According to another particular embodiment of the proposed method thestep S6 of patterning the single metal layer comprises the use ofphotolithography.

Still another embodiment of the proposed technology provides a methodwherein the step S1 of providing a semi-conducting substrate 102comprises to provide a silicon substrate.

Yet another embodiment of the proposed technology provides a method thestep of depositing S5 a single metal layer on top of the chargecollecting surface comprises depositing a single aluminum layer. Itshould be noted that several metal layers may be deposited on top of thefirst metal layer. One may for example perform the suggested method afirst time in order to get a charge collecting side having a first metallayer patterned to form routing traces and charge collecting electrodesand then repeat the depositing step one or several times in order toobtain several metal layers forming charge collecting electrodes androuting traces that are arranged on top of each other.

According to an optional embodiment of the proposed technology there isprovided a method wherein the step S3 of providing an insulating layer106 on the regions of the second surface that are not provided withdoped regions 107, comprises providing a silicon dioxide layer.

According to particular embodiment of the proposed technology there isprovided a method wherein the step S6 of patterning the metal layercomprises to form at least two strips of charge collecting electrodes,where each of the charge collecting electrodes have width dimensionssuch that the ratio of the charge collecting metal electrode width tostrip pitch is less than 0.8.

Another embodiment of the proposed technology provides a method whereinthe step S6 of patterning the metal layer further comprises to formrouting traces having width dimension such that the ratio of the routingtrace width to strip pitch is less than 0.05.

The proposed technology also provides an edge-on detector comprising acharge collecting surface manufactured according to the methodsdescribed above.

The embodiments shown in the present disclosure show the examples withN-type crystalline silicon, it should be recognized that the proposedtechnology also can be applied to P-type crystalline with N-plus dopedelectrodes. It should be recognized that variations of sensor shape willimmediately become apparent to those skilled in the art. It is thereforethe intention that the appended claims be interpreted as broadly aspossible to include all such variations and modifications, for example,the triangular shape of a sensor or a sensor with two chamfered corners.In addition, different number of depth segments and different variationin segment lengths are covered by the present claimed invention.

REFERENCES

R. Nowotny “Application of Si-microstrip-detectors in medicine andstructural analysis” Nuclear Instruments and Methods in Physics Research226 (1984) 34-39

U.S. Pat. No. 4,937,453 Robert Nelson “X-ray detector for radiographicimaging”

U.S. Pat. No. 5,434,417 David Nygren “High resolution energy-sensitivedigital X-ray”

U.S. Pat. No. 7,291,841 B2 Robert Nelson et al. “Device and system forenhanced SPECT, PET, and Compton scatter imaging in nuclear medicine”

Shoichi Yoshida, Takashi Ohsugi “Application of silicon strip detectorsto X-ray computed tomography” Nuclear Instruments and Methods in PhysicsResearch A 541 (2005) 412-420

U.S. Pat. No. 8,183,535 B2 Mats Danielsson et al. “Silicon detectorassembly for x-ray imaging”

Cheng Xu et al. “Energy resolution of a segmented silicon strip detectorfor photon-counting spectral CT” Nuclear Instruments and Methods inPhysics Research A 715 (2013)11-17

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Swedish Patent Application, No. 9801677-7, Mats Danielsson

“Charge collection in silicon strip detectors” Nuclear instruments andmethods in physics research 214(2-3) (1983) 253-260

1. An edge-on photon counting detector comprising a semi-conductingsubstrate comprising: a first end adapted to face an x-ray source and asecond end opposite said first end in the direction of incoming x-rays;at least one strip having N depth segments, N≥2, each of said depthsegments comprising a charge collecting metal electrode; a chargecollecting side comprising doped regions and insulating regions; whereineach of said charge collecting metal electrodes is arranged over acorresponding doped region and is connected to a respective routingtrace arranged on said insulating regions, said respective routing tracebeing adapted to conduct signals from the charge collecting metalelectrode to a read-out pad, connectable to front-end electronics,arranged at said second end.
 2. The edge-on detector according to claim1, wherein said semi-conducting substrate comprises silicon.
 3. Theedge-on detector according to claim 1, wherein said charge collectingmetal electrodes and said routing traces are manufactured from the samemetal.
 4. The edge-on detector according to claim 3, wherein said chargecollecting metal electrodes and said routing traces are provided in asingle metal layer.
 5. The edge-on detector according to claim 4,wherein said metal is aluminum.
 6. The edge-on detector according toclaim 1, wherein said insulating regions comprises regions of silicondioxide.
 7. The edge-on detector according to claim 2, wherein saidcharge collecting metal electrodes and said routing traces aremanufactured from the same metal.
 8. The edge-on detector according toclaim 2, wherein said insulating regions comprises regions of silicondioxide.
 9. The edge-on detector according to claim 3, wherein saidinsulating regions comprises regions of silicon dioxide.
 10. The edge-ondetector according to claim 4, wherein said insulating regions comprisesregions of silicon dioxide.
 11. The edge-on detector according to claim5, wherein said insulating regions comprises regions of silicon dioxide.12. The edge-on detector according to claim 7, wherein said insulatingregions comprises regions of silicon dioxide.
 13. The edge-on detectoraccording to claim 1, wherein the number of strips is at least two andwherein the width dimension of the routing traces are such that theratio of the routing trace width to strip pitch is less than 0.05 inorder to reduce capacitance.
 14. The edge-on detector according to claim1, wherein the semi-conducting substrate is provided with doped regionsin the area adjacent to the read-out pad arranged at said second end.15. The edge-on detector according to claim 14, wherein said areaadjacent to the read-out pad are further provided with insulatingregions, whereby said doped regions and said insulating regions arearranged to form a pattern so that said routing traces run on theinsulating regions to said read-out pad.
 16. The edge-on detectoraccording to claim 1, wherein said semi-conducting substrate have atapered shape, whereby the first end of said semi-conducting substratehave a first width and the second end of said semi-conducting substratehave a second width, larger than said first width.
 17. The edge-ondetector according to claim 16, wherein said semi-conducting substratecomprises at least two strips of charge collecting metal electrodes,said strips being angled relative each other so that the chargecollecting electrodes are provided on said charge collecting side in atapered pattern following adapted to the tapered shape of saidsubstrate.
 18. The edge-on detector according to claim 1, wherein saidsecond end of said substrate comprises at least one chamfered corner.19. The edge-on detector according to claim 2, wherein the number ofstrips is at least two and wherein the width dimension of the routingtraces are such that the ratio of the routing trace width to strip pitchis less than 0.05 in order to reduce capacitance.
 20. The edge-ondetector according to claim 3, wherein the number of strips is at leasttwo and wherein the width dimension of the routing traces are such thatthe ratio of the routing trace width to strip pitch is less than 0.05 inorder to reduce capacitance.